EDN

Bridging Xilinx Streaming Video Interface with the AXI4-Stream Protocol

The ARM® core AMBA® specification (version 4.0) AXI interconnect standard includes three Advanced eXtensible Interface version 4 (AXI4) interconnect protocols—AXI4 interconnect, AXI4-Lite protocol, ...
EDN

Designing High-Performance Video Systems

This application note covers the design considerations of a system using the performance features of the LogiCORE™ IP Advanced eXtensible Interface (AXI) Interconnect core. The design focuses on high ...
Design-Reuse

Silistix Self-Timed Interconnect Solution Adds Support for AXI Bus Protocol

Extends Designer Use of Popular AMBA Buses for Asynchronous Interconnect on SoCs SAN JOSE, CA -- July 17, 2006 -- Silistix, a provider of innovative software for on-chip communications solutions, ...
Design-Reuse

Xilinx Launches First Design Platforms for Accelerating 7 Series FPGA Design Productivity and System Integration

See Industry's First Complete Development Kits for Increasing System Performance, Lowering Power, and Reducing BoM with 28nm FPGA Technology at DesignCon 2012 SAN JOSE, Calif., Jan. 31, 2012-- Xilinx, ...